Datasheet

Bit 5 – WINLT Window Monitor Lower Threshold
Value Description
0
DMA update of the Window Monitor Lower Threshold register is disabled.
1
DMA update of the Window Monitor Lower Threshold register is enabled.
Bit 4 – SAMPCTRL Sampling Time Control
Value Description
0
DMA update of the Sampling Time Control register is disabled.
1
DMA update of the Sampling Time Control register is enabled.
Bit 3 – AVGCTRL Average Control
Value Description
0
DMA update of the Average Control register is disabled.
1
DMA update of the Average Control register is enabled.
Bit 2 – REFCTRL Reference Control
Value Description
0
DMA update of the Reference Control register is disabled.
1
DMA update of the Reference Control register is enabled.
Bit 1 – CTRLB Control B
Value Description
0
DMA update of the Control B register is disabled.
1
DMA update of the Control B register is enabled.
Bit 0 – INPUTCTRL Input Control
Value Description
0
DMA update of the Input Control register is disabled.
1
DMA update of the Input Control register is enabled.
SAM D5x/E5x Family Data Sheet
ADC – Analog-to-Digital Converter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1634