Datasheet

45.8.4 Input Control
Name: INPUTCTRL
Offset: 0x04
Reset: 0x0000
Property: PAC Write-Protection, Write-Synchronized
Bit 15 14 13 12 11 10 9 8
DSEQSTOP MUXNEG[4:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
DIFFMODE MUXPOS[4:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 15 – DSEQSTOP Stop DMA Sequencing
When the bit is set, the DMA sequencing automatically stops when the last sequence configuration is
complete.
Note: one more conversion will be done after the last sequence is complete.
Bits 12:8 – MUXNEG[4:0] Negative MUX Input Selection
These bits define the MUX selection for the negative ADC input.
Value Name Description
0x00
AIN0 ADC AIN0 pin
0x01
AIN1 ADC AIN1 pin
0x02
AIN2 ADC AIN2 pin
0x03
AIN3 ADC AIN3 pin
0x04
AIN4 ADC AIN4 pin
0x05
AIN5 ADC AIN5 pin
0x06
AIN6 ADC AIN6 pin
0x07
AIN7 ADC AIN7 pin
0x08 -
0x17
Reserved
0x18
GND Internal ground
0x19 -
0x1F
Reserved
Bit 7 – DIFFMODE Differential Mode
Value Description
0x0
The ADC is running in singled-ended mode.
0x1
The ADC is running in differential mode. In this mode, the voltage difference between the
MUXPOS and MUXNEG inputs will be converted by the ADC.
Bits 4:0 – MUXPOS[4:0] Positive MUX Input Selection
These bits define the MUX selection for the positive ADC input. If the internal bandgap voltage or
temperature sensor input channel is selected, then the Sampling Time Length bit group in the Sampling
SAM D5x/E5x Family Data Sheet
ADC – Analog-to-Digital Converter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1614