Datasheet

Value Description
0
The ADC is always on , if enabled.
1
The ADC is enabled, when a peripheral is requesting the ADC conversion. The ADC is
disabled if no peripheral is requesting it.
Bit 6 – RUNSTDBY Run in Standby
This bit controls how the ADC behaves during standby sleep mode.
This bit is not synchronized.
Note: For the slave ADC, this bit has no effect when the SLAVEEN bit is set (CTRLA.SLAVEEN= 1).
RUNSTDBY bit from master ADC instance will control the slave ADC operation in standby sleep mode.
Value Description
0
The ADC is halted during standby sleep mode.
1
The ADC is not stopped in standby sleep mode. If CTRLA.ONDEMAND=1, the ADC will be
running when a peripheral is requesting it. If CTRLA.ONDEMAND=0, the ADC will always be
running in standby sleep mode.
Bit 5 – SLAVEEN Slave Enable
This bit enables the master/slave operation and it is available only in the slave ADC instance.
This bit is not synchronized and can be set only for the slave ADC. For the master ADC, this bit is always
read zero.
Value Description
0
The master/slave operation is disabled
1
The ADC1 is enabled as a slave of ADC0
Bits 4:3 – DUALSEL[1:0] Dual Mode Trigger Selection
These bits define the trigger mode, as shown in Table below. These bits are available in the master ADC
and have no effect if the master/slave operation is disabled (ADC1.CTRLA.SLAVEEN=0).
Value Name Description
0x0
BOTH Start event or software trigger will start a conversion on both ADCs
0x1
INTERLEAVE START event or software trigger will alternatingly start a conversion on ADC0
and ADC1.
Note: The interleaved sampling is only usable in single conversion mode
(ADC.CTRLB.FREERUN=0).
0x2 -
0x3
Reserved
Bit 1 – ENABLE Enable
Due to synchronization there is delay from writing CTRLA.ENABLE until the peripheral is enabled/
disabled. The value written to CTRL.ENABLE will read back immediately and the ENABLE bit in the
Synchronization Busy register (SYNCBUSY.ENABLE) will be set. SYNCBUSY.ENABLE will be cleared
when the operation is complete.
For the slave ADC, this bit has no effect when the SLAVEEN bit is set (CTRLA.SLAVEEN= 1).
Value Description
0
The ADC is disabled.
1
The ADC is enabled.
Bit 0 – SWRST Software Reset
Writing a '0' to this bit has no effect.
SAM D5x/E5x Family Data Sheet
ADC – Analog-to-Digital Converter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1609