Datasheet

DMA Descriptor Setup and Data Memory Organization
When DMA sequencing is enabled, the DMA Controller (DMAC) must be configured in the following way:
• Select 32-bit beat size transfer (DMAC.BTCTRL.BEATSIZE=WORD).
• Enable the source address increment options (DMAC.BTCTRL.SRCINC = 1,
DMAC.BTCTRL.STEPSEL = SRC, DMAC.BTCTRL.STEPSIZE = X1).
• Disable the destination address increment (DMAC.BTCTRL.DSTINC=0).
• Set the block transfer count value (DMAC.BTCNT).
• Set the block transfer source address (DMAC.SRCADDR), as described in the DMAC Addressing
section. The address corresponds to the memory section from where the DMA reads the data.
• Select the ADC.DSEQDATA address as value for the block transfer destination address
(DMAC.DSTADDR = ADC.DSEQDATA address).
• Select the channel single transfer type (DMAC.CHCTRLA.BURSTLEN=SINGLE)
• Select the channel burst trigger action (DMAC.CHCTRLA.TRIGACT=BURST)
• Select the ADC DMA Sequencing trigger as channel trigger source
(DMAC.CHCTRLA.TRIGSRC=DSEQ)
• Enable optional channel interrupts (DMAC.CHINTENSET)
• Enable the corresponding DMA channel (DMAC.CHCTRLA.ENABLE)
When an ADC condition is enabled to trigger a DMA transfer, one word (32-bit) will be read by the DMA
from the memory source location. Since the source address is incrementing by 0x1, the data memory
must be organized in a contiguous memory area. As consequence, if an ADC group of registers does not
generate any DMA trigger, no data must be reserved in the memory area for this register group. The next
figure shows an example of memory organization when all ADC registers are part of the sequence, and a
second example where WINLT and WINUT registers are not part of the sequence.
GAINCORR
GAINCORR
INPUTCTRL
CTRLB
REFCTRL
AVGCTRL
SAMPCTRL
OFFSETCORR
DON'T CARE
Memory
+0x00
+0x04
+0x08
+0x0C = SRCADDR
WINLT / WINUT registers are not in the sequence
INPUTCTRL
CTRLB
REFCTRL
AVGCTRL
SAMPCTRL
OFFSETCORR
DON'T CARE
Memory
+0x00
+0x04
+0x08
+0x0C
All registers are in the sequence
WINLT
WINUT
+0x10 = SRCADDR
Automatic Start Conversion
SAM D5x/E5x Family Data Sheet
ADC – Analog-to-Digital Converter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1600