Datasheet

Table Of Contents
45.5.6 Events
The events are connected to the Event System.
Related Links
31. EVSYS – Event System
45.5.7 Debug Operation
When the CPU is halted in debug mode the ADC will halt normal operation. The ADC can be forced to
continue operation during debugging. Refer to DBGCTRL register for details.
Related Links
45.8.3 DBGCTRL
45.5.8 Register Access Protection
All registers with write-access are optionally write-protected by the Peripheral Access Controller (PAC),
except the following register:
Interrupt Flag Status and Clear (INTFLAG) register
Optional write protection by the Peripheral Access Controller (PAC) is denoted by the "PAC Write
Protection" property in each individual register description.
PAC write protection does not apply to accesses through an external debugger.
Related Links
27. PAC - Peripheral Access Controller
45.5.9 Analog Connections
I/O-pins (AINx), as well as the VREFA/VREFB/VREFC reference voltage pins are analog inputs to the
ADC. Any internal reference source, such as a bandgap voltage reference, or DAC must be configured
and enabled prior to its use with the ADC.
45.5.10 Calibration
The BIASREFBUF, BIASR2R and BIASCOMP calibration values from the production test must be loaded
from the NVM Software Calibration Area into the ADC Calibration register (CALIB) by software to achieve
specified accuracy.
45.6 Functional Description
45.6.1 Principle of Operation
By default, the ADC provides results with 12-bit resolution. 8-bit or 10-bit results can be selected in order
to reduce the conversion time, see 45.6.2.8 Conversion Timing and Sampling Rate.
The ADC has an oversampling with decimation option that can extend the resolution to 16 bits. The input
values can be either internal (e.g., an internal temperature sensor) or external (connected I/O pins). The
user can also configure whether the conversion should be single-ended or differential.
45.6.2 Basic Operation
45.6.2.1 Initialization
The following registers are enable-protected, meaning that they can only be written when the ADC is
disabled (CTRLA.ENABLE=0):
SAM D5x/E5x Family Data Sheet
ADC – Analog-to-Digital Converter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1588