Datasheet

44.6 Functional Description
44.6.1 Principle of Operation
When the TRNG is enabled, the peripheral starts providing new 32-bit random numbers every 84
CLK_TRNG_APB clock cycles.
The TRNG can be configured to generate an interrupt or event when a new random number is available.
Figure 44-2. TRNG Data Generation Sequence
84 clock cycles
84 clock cycles
84 clock cycles
Read TRNG_ISR
Read DATA
Read TRNG_ISR
Read DATA
Clock
Interrupt
ENABLE
44.6.2 Basic Operation
44.6.2.1 Initialization
To operate the TRNG, do the following:
• Configure the clock source for CLK_TRNG_APB in the Main Clock Controller (MCLK) and enable the
clock by writing a ‘1’ to the TRNG bit in the APB Mask register of the MCLK.
• Optional: Enable the output event by writing a ‘1’ to the EVCTRL.DATARDYEO bit.
• Optional: Enable the TRNG to Run in Standby sleep mode by writing a ‘1’ to CTRLA.RUNSTDBY.
• Enable the TRNG operation by writing a ‘1’ to CTRLA.ENABLE.
The following register is enable-protected, meaning that it can only be written when the TRNG is disabled
(CTRLA.ENABLE is zero):
• Event Control register (EVCTRL)
Enable-protection is denoted by the Enable-Protected property in the register description.
44.6.2.2 Enabling, Disabling and Resetting
The TRNG is enabled by writing '1' to the Enable bit in the Control A register (CTRLA.ENABLE). The
TRNG is disabled by writing a zero to CTRLA.ENABLE.
44.6.3 Interrupts
The TRNG has the following interrupt source:
• Data Ready (DATARDY): Indicates that a new random number is available in the DATA register and
ready to be read.
This interrupt is a synchronous wake-up source. See Sleep Mode Controller for details.
The interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status
and Clear register (INTFLAG.DATARDY) is set to ‘1’ when the interrupt condition occurs. The interrupt
can be enabled by writing a '1' to the corresponding bit in the Interrupt Enable Set register
(INTENSET.DATARDY), and disabled by writing a '1' to the corresponding bit in the Interrupt Enable Clear
(INTENCLR) register.
SAM D5x/E5x Family Data Sheet
TRNG – True Random Number Generator
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1576