Datasheet

The TRNG interrupts can be used to wake up the device from sleep modes. Events connected to the
event system can trigger other operations in the system without exiting sleep modes.
Related Links
18. PM – Power Manager
44.6.5 Sleep Mode Operation
44.5.3 Clocks
The TRNG bus clock (CLK_TRNG_APB) can be enabled and disabled in the Main Clock module, and the
default state of CLK_TRNG_APB can be found in Peripheral Clock Masking.
Related Links
15.6.2.6 Peripheral Clock Masking
44.5.4 DMA
Not applicable.
44.5.5 Interrupts
The interrupt request line is connected to the interrupt controller. Using the TRNG interrupt(s) requires the
interrupt controller to be configured first. Refer to NVIC - Nested Interrupt Nested Vector Interrupt
Controller for details.
Related Links
10.2 Nested Vector Interrupt Controller
44.5.6 Events
TRNG can generate Events that are used by the Event System (EVSYS) and EVSYS users.
TRNG cannot use any Events from other peripherals, as it is not an Event User.
Related Links
31. EVSYS – Event System
44.5.7 Debug Operation
When the CPU is halted in debug mode the TRNG continues normal operation. If the TRNG is configured
in a way that requires it to be periodically serviced by the CPU through interrupts or similar, improper
operation or data loss may result during debugging.
44.5.8 Register Access Protection
All registers with write-access are optionally write-protected by the Peripheral Access Controller (PAC),
except the following register:
Interrupt Flag Status and Clear (INTFLAG) register
Optional write protection by the Peripheral Access Controller (PAC) is denoted by the "PAC Write
Protection" property in each individual register description.
44.5.9 Analog Connections
Not applicable.
SAM D5x/E5x Family Data Sheet
TRNG – True Random Number Generator
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1575