Datasheet

Table Of Contents
13.2 Synchronous and Asynchronous Clocks
As the CPU and the peripherals can be in different clock domains, i.e. they are clocked from different
clock sources and/or with different clock speeds, some peripheral accesses by the CPU need to be
synchronized. In this case the peripheral includes a Synchronization Busy (SYNCBUSY) register that can
be used to check if a sync operation is in progress.
For a general description, see 13.3 Register Synchronization. Some peripherals have specific properties
described in their individual sub-chapter “Synchronization”.
In the datasheet, references to Synchronous Clocks are referring to the CPU and bus clocks (MCLK),
while asynchronous clocks are generated by the Generic Clock Controller (GCLK).
Related Links
14.6.6 Synchronization
13.3 Register Synchronization
13.3.1 Overview
All peripherals are composed of one digital bus interface connected to the APB or AHB bus and running
from a corresponding clock in the Main Clock domain, and one peripheral core running from the
peripheral Generic Clock (GCLK).
Communication between these clock domains must be synchronized. This mechanism is implemented in
hardware, so the synchronization process takes place even if the peripheral generic clock is running from
the same clock source and on the same frequency as the bus interface.
All registers in the bus interface are accessible without synchronization.
All registers in the peripheral core are synchronized when written. Some registers in the peripheral core
are synchronized when read.
Each individual register description will have the properties "Read-Synchronized" and/or "Write-
Synchronized" if a register is synchronized.
As shown in the figure below, each register that requires synchronization has its individual synchronizer
and its individual synchronization status bit in the Synchronization Busy register (SYNCBUSY).
Note:  For registers requiring both read- and write-synchronization, the corresponding bit in SYNCBUSY
is shared.
SAM D5x/E5x Family Data Sheet
Clock System
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 147