Datasheet

42.8.10 Initialization Vector Register
Name: INTVECTV
Offset: 0x3C + n*0x04 [n=0..3]
Reset: 0x00000000
Property: PAC Write-Protection
Bit 31 30 29 28 27 26 25 24
INTVECTV[31:24]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
INTVECTV[23:16]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
INTVECTV[15:8]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
INTVECTV[7:0]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bits 31:0 – INTVECTV[31:0] Initialization Vector Value
The four 32-bit Initialization Vector registers INTVECTVn set the 128-bit Initialization Vector data block
that is used by some modes of operation as an additional initial input. INTVECTV0.INTVECTV
corresponds to the first word of the Initialization Vector, INTVECTV3.INTVECTV to the last one. These
registers are write-only to prevent the Initialization Vector from being read by another application. For
CBC, OFB, and CFB modes, the Initialization Vector corresponds to the initialization vector. For CTR
mode, it corresponds to the counter value.
SAM D5x/E5x Family Data Sheet
AES – Advanced Encryption Standard
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1438