Datasheet

Table Of Contents
GHASH
AUTHDAT +
GF128Mult(H)
GHASH
42.6.3.1.3 Plain text Processing
Set CTRLB.NEWMSG for the new set of plain text processing.
Load CIPLEN reg.
Load (J0+1) in INTVECT register.
As described in NIST documentation J 0 = IV || 0 31 || 1 when len(IV)=96 and J0 =GHASH
H
(IV || 0 s
+64 || [len(IV)] 64 ) (s is the minimum number of zeroes that should be padded with the Initialization
Vector to make it a multiple of 128) if len(IV) != 96.
Load plain text in DATA register.
Set CTRLB.START as 1.
Wait for INTFLAG.ENCCMP to be set.
AES Hardware generates output in DATA register.
Intermediate GHASH is stored in GHASH register and Cipher Text available in DATA register.
Continue 3 to 6 till the input of plain text to get the cipher text and the Hash keys.
At the last input, set CTRLB.EOM.
Write last in-data to DATA reg.
Set CTRLB.START as 1.
Wait for INTFLAG.ENCCMP to be set.
AES Hardware generates output in DATA register and final Hash key in GHASH register.
Load [LEN(A)]64||[LEN(C)]64 in DATA register and set CTRLB.GFMUL and CTRLB.START as 1.
Wait for INTFLAG.GFMCMP to be set.
AES Hardware generates final GHASH value in GHASH register.
42.6.3.1.4 Plain text processing with DMAC
Set CTRLB.NEWMSG for the new set of plain text processing.
Load CIPLEN reg.
Load (J0+1) in INTVECT register.
Load plain text in DATA register.
Wait for INTFLAG.ENCCMP to be set.
SAM D5x/E5x Family Data Sheet
AES – Advanced Encryption Standard
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1422