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Type 3: Add a random number of clock cycles to data processing, subject to a maximum of 11/13/15
clock cycles for key sizes of 128/192/256 bits
Type 4: Add random spurious power consumption during data processing
By default, all countermeasures are enabled. One or more of the countermeasures can be disabled by
programming the Countermeasure Type field in the Control A (CTRLA.CTYPE) register. The
countermeasures use random numbers generated by a deterministic random number generator
embedded in AES module. The seed for the random number generator is written to the RANDSEED
register. Note also that a new seed must be written after a change in the keysize. Note that enabling
countermeasures reduces AES module’s throughput. In short, the throughput is highest with all the
countermeasures disabled. On the other hand, with all of the countermeasures enabled, the best
protection is achieved but the throughput is worst.
42.6.3 Galois Counter Mode (GCM)
GCM is comprised of the AES engine in CTR mode along with a universal hash function (GHASH engine)
that is defined over a binary Galois field to produce a message authentication tag. The GHASH engine
processes data packets after the AES operation. GCM provides assurance of the confidentiality of data
through the AES Counter mode of operation for encryption. Authenticity of the confidential data is
assured through the GHASH engine. Refer to the NIST Special Publication 800-38D Recommendation
for more complete information.
SAM D5x/E5x Family Data Sheet
AES – Advanced Encryption Standard
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1419