Datasheet

41.8.3 LUT Control x
Name: LUTCTRL
Offset: 0x08 + n*0x04 [n=0..3]
Reset: 0x00000000
Property: PAC Write-Protection, Enable-protected
Bit 31 30 29 28 27 26 25 24
TRUTH[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
LUTEO LUTEI INVEI INSELx[3:0]
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
INSELx[3:0] INSELx[3:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
EDGESEL FILTSEL[1:0] ENABLE
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bits 31:24 – TRUTH[7:0] Truth Table
These bits define the value of truth logic as a function of inputs IN[2:0].
Bit 22 – LUTEO LUT Event Output Enable
Value Description
0
LUT event output is disabled.
1
LUT event output is enabled.
Bit 21 – LUTEI LUT Event Input Enable
Value Description
0
LUT incoming event is disabled.
1
LUT incoming event is enabled.
Bit 20 – INVEI Inverted Event Input Enable
Value Description
0
Incoming event is not inverted.
1
Incoming event is inverted.
Bit 7 – EDGESEL Edge Selection
Value Description
0
Edge detector is disabled.
1
Edge detector is enabled.
SAM D5x/E5x Family Data Sheet
CCL – Configurable Custom Logic
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1410