Datasheet

40.8.41 Capabilities Control Register
Name: CACR
Offset: 0x230
Reset: 0x00000000
Property: -
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
KEY[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
CAPWREN
Access
R/W
Reset 0
Bits 15:8 – KEY[7:0] Key
Value Name Description
46h
KEY Writing any other value in this field aborts the write operation of the CAPWREN bit.
Always reads as 0.
Bit 0 – CAPWREN Capabilities Write Enable
This bit can only be written if KEY correspond to 46h.
Value Description
0
Capabilities registers (CA0R and CA1R) cannot be written.
1
Capabilities registers (CA0R and CA1R) can be written.
SAM D5x/E5x Family Data Sheet
SD/MMC Host Controller ...
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1391