Datasheet

Bit 19 – ADMA2SUP ADMA2 Support
This bit indicates whether the peripheral is capable of using ADMA2.
Value Description
0
ADMA2 not supported
1
ADMA2 supported
Bit 18 – ED8SUP 8-Bit Support for Embedded Device
This bit indicates whether the peripheral is capable of using the 8-bit Bus Width mode.
Value Description
0
8-bit bus width not supported
1
8-bit bus width supported
Bit 16 – MAXBLKL Max Block Length
This field indicates the maximum block size that the user can read and write to the buffer in the
peripheral.
Note: For SD Memory Cards, the transfer block length is always 512 bytes, regardless of this field.
Value Name Description
0
512 512 bytes
1
NONE Reserved
Bits 15:8 – BASECLKF[7:0] Base Clock Frequency
This value indicates the frequency of the base clock (BASECLK). The user uses this value to calculate
the clock divider value (refer to SDCLK Frequency Select (SDCLKFSEL) in CCR).
If this field is set to 0, the user must get the information via another method.

BASECLK
= BASECLKF
MHz
Bit 7 – TEOCLKU Timeout Clock Unit
This bit shows the unit of the base clock frequency used to detect Data Timeout Error.
Value Description
0
kHz
1
MHz
Bits 5:0 – TEOCLKF[5:0] Timeout Clock Frequency
This bit shows the timeout clock frequency (TEOCLK) used to detect Data Timeout Error.
If this field is set to 0, the user must get the information via another method.
The Timeout Clock Unit (TEOCLKU) defines the unit of this field’s value.
– TEOCLKU = 0:

TEOCLK
= TEOCLKF
KHz
– TEOCLKU = 1:

TEOCLK
= TEOCLKF
MHz
SAM D5x/E5x Family Data Sheet
SD/MMC Host Controller ...
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1372