Datasheet

40.8.26 Capabilities 0 Register
Name: CA0R
Offset: 0x40
Reset: 0x27E80080
Property: -
Note: The Capabilities 0 Register is not supposed to be written by the user.
Bit 31 30 29 28 27 26 25 24
SLTYPE[1:0] ASINTSUP SB64SUP V18VSUP V30VSUP V33VSUP
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 1 0 1 1 1
Bit 23 22 21 20 19 18 17 16
SRSUP SDMASUP HSSUP ADMA2SUP ED8SUP MAXBLKL
Access
R/W R/W R/W R/W R/W R/W
Reset 1 1 1 1 0 0
Bit 15 14 13 12 11 10 9 8
BASECLKF[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
TEOCLKU TEOCLKF[5:0]
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 1 0 0 0 0 0 0
Bits 31:30 – SLTYPE[1:0] Slot Type
This field indicates usage of a slot by a specific system. An peripheral control register set is defined per
slot.
Embedded Slot for One Device means that only one non-removable device is connected to a bus slot.
The Standard Host Driver controls a removable card (SLTYPE = 0) or one embedded device (SLTYPE =
1) connected to an SD bus slot.
Value Name
0
Removable Card Slot
1
Embedded Slot for One Device
2
Shared Bus Slot
2
Reserved
3
Reserved
Bit 29 – ASINTSUP Asynchronous Interrupt Support
Refer to section “Asynchronous Interrupt” in the “SDIO Simplified Specification V3.00”.
Value Description
0
Asynchronous interrupt not supported
1
Asynchronous interrupt supported
SAM D5x/E5x Family Data Sheet
SD/MMC Host Controller ...
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1370