Datasheet

Table Of Contents
40.8.6 Command Register
Name:  CR
Offset:  0x0E
Reset:  0x0000
Property:  -
Bit 15 14 13 12 11 10 9 8
CMDIDX[5:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
CMDTYP[1:0] DPSEL CMDICEN CMDCCEN RESPTYP[1:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0
Bits 13:8 – CMDIDX[5:0] Command Index
This bit shall be set to the command number (CMD0-63, ACMD0-63) that is specified in bits 45-40 of the
Command-Format in the “Physical Layer Simplified Specification V3.01”, “SDIO Simplified Specification
V3.00”, and “Embedded MultiMedia Card (e.MMC) Electrical Standard 4.51”.
Bits 7:6 – CMDTYP[1:0] Command Type
Value Name Description
0
NORMAL Other commands
1
SUSPEND CMD52 to write “Bus Suspend” in the Card Common Control Registers (CCCR)
(for SDIO only)
2
RESUME CMD52 to write “Function Select” in the Card Common Control Registers
(CCCR) (for SDIO only)
3
ABORT CMD12, CMD52 to write “I/O Abort” in the Card Common Control Registers
(CCCR) (for SDIO only)
Bit 5 – DPSEL Data Present Select
This bit is set to 1 to indicate that data is present and shall be transferred using the DAT lines. It is set to 0
for the following:
1. Commands using only CMD line (Ex. CMD52)
2. Commands with no data transfer but using Busy signal on DAT[0] line (Ex. CMD38)
3. Resume command
Value Description
0
No data present
1
Data present
Bit 4 – CMDICEN Command Index Check Enable
If this bit is set to 1, the peripheral checks the Index field in the response to see if it has the same value
as the command index. If it has not, it is reported as a Command Index Error (CMDIDX) in EISTR. If this
bit is set to 0, the Index field of the response is not checked.
Value Name Description
0
DISABLED The Command Index Check is disabled.
SAM D5x/E5x Family Data Sheet
SD/MMC Host Controller ...
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1325