Datasheet

39.8.31 Rx FIFO 1 Configuration
Name: RXF1C
Offset: 0xB0
Reset: 0x00000000
Property: Write-restricted
This register is write-restricted and only writable if bit fields CCCR.CCE = 1 and CCCR.INIT = 1.
Bit 31 30 29 28 27 26 25 24
F1OM F1WM[6:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
F1S[6:0]
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
F1SA[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
F1SA[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 31 – F1OM FIFO 1 Operation Mode
FIFO 1 can be operated in blocking or in overwrite mode.
Value Description
0
FIFO 1 blocking mode.
1
FIFO 1 overwrite mode.
Bits 30:24 – F1WM[6:0] Rx FIFO 1 Watermark
Value Description
0
Watermark interrupt disabled.
1 - 64
Level for Rx FIFO 1 watermark interrupt (IR.RF1W).
>64
Watermark interrupt disabled.
Bits 22:16 – F1S[6:0] Rx FIFO 1 Size
The Rx FIFO 1 elements are indexed from 0 to F1S - 1.
Value Description
0
No Rx FIFO 1
1 - 64
Number of Rx FIFO 1 elements.
>64
Values greater than 64 are interpreted as 64.
SAM D5x/E5x Family Data Sheet
CAN - Control Area Network
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1280