Datasheet

When a debug message is stored, neither the respective New Data flag nor IR.DRX are set. The
reception of debug messages can be monitored via RXF1S.DMS.
Table 39-5. Example Filter Configuration for Debug Messages
Filter Element SFID1[10:0] / EFID1[28:0] SFID2[10:9] / EFID2[10:9] SFID2[5:0] / EFID2[5:0]
0 ID debug message A 01 11 1101
1 ID debug message B 10 11 1110
2 ID debug message C 11 11 1111
Debug Message Handling
The debug message handling state machine assures that debug messages are stored to three
consecutive Rx Buffers in correct order. In case of missing messages the process is restarted. The DMA
request is activated only when all three debug messages A, B, C have been received in correct order.
Figure 39-9. Debug Message Handling State Machine
T0
T1
T2
T3
T4
T5
T6
T7
T8
DMS = 00
DMS = 01
DMS = 10
DMS = 11
HW reset
or
Initial state
T0: Reset DMA request output, enable reception of debug message A, B, and C
T1: Reception of debug message A
T2: Reception of debug message A
T3: Reception of debug message C
T4: Reception of debug message B
T5: Reception of debug message A, B
T6: Reception of debug message C
T7: DMA transfer completed
T8: Reception of debug message A, B, C (message rejected)
39.6.6 Tx Handling
The Tx Handler handles transmission requests for the dedicated Tx Buffers, the Tx FIFO, and the Tx
Queue. It controls the transfer of transmit messages to the CAN Core, the Put and Get Indices, and the
Tx Event FIFO. Up to 32 Tx Buffers can be set up for message transmission. The CAN mode for
transmission (Classic CAN or CAN FD) can be configured separately for each Tx Buffer element. The Tx
Buffer element is described in 39.9.3 Tx Buffer Element. The table below describes the possible
configurations for frame transmission.
SAM D5x/E5x Family Data Sheet
CAN - Control Area Network
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1221