Datasheet

Figure 39-6. Extended Message ID Filtering
11 / 29 bit identifier
remote frame
reject remote frames
receive filter list enabled
match filter element #0
match filter element #XIDFC.LSE
accept non-matching frames
acceptance / rejection
discard frame
valid frame received
target FIFO full (blocking)
or Rx Buffer ND = '1'
store frame
11-bit
29-bit
yes
no
GFC.RRFE = '1'
GFC.RRFE = '0'
yes
yes
no
GFC.ANFE[1] = '1'
GFC.ANFE[1] = '0'
accept
reject
yes
no
XIDFC.LSE[6:0] > 0
XIDFC.LSE[6:0] = 0
39.6.5.2 Rx FIFOs
Rx FIFO 0 and Rx FIFO 1 can be configured to hold up to 64 elements each. Configuration of the two Rx
FIFOs is done via registers RXF0C and RXF1C.
Received messages that passed acceptance filtering are transferred to the Rx FIFO as configured by the
matching filter element. For a description of the filter mechanisms available for Rx FIFO 0 and Rx FIFO 1
see 39.6.5.1 Acceptance Filtering. The Rx FIFO element is described in 39.9.2 Rx Buffer and FIFO
Element.
To avoid an Rx FIFO overflow, the Rx FIFO watermark can be used. When the Rx FIFO fill level reaches
the Rx FIFO watermark configured by RXFnC.FnWM, interrupt flag IR.RFnW is set. When the Rx FIFO
Put Index reaches the Rx FIFO Get Index an Rx FIFO Full condition is signalled by RXFnS.FnF. In
addition interrupt flag IR.RFnF is set.
SAM D5x/E5x Family Data Sheet
CAN - Control Area Network
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1217