Datasheet

In case of a successful frame transmission, and if storage of Tx events is enabled, a Tx Event FIFO
element is written with Event Type ET = “10” (transmission in spite of cancellation).
39.6.2.8 Test Modes
To enable write access to register TEST, bit CCCR.TEST has to be set to ‘1’. This allows the configuration
of the test modes and test functions.
Four output functions are available for the CAN transmit pin CAN_TX by programming TEST.TX.
Additionally to its default function – the serial data output – it can drive the CAN Sample Point signal to
monitor the CAN’s bit timing and it can drive constant dominant or recessive values. The actual value at
pin CAN_RX can be read from TEST.RX. Both functions can be used to check the CAN bus’ physical
layer.
Due to the synchronization mechanism between GCLK_CAN and GCLK_CAN_APB domains, there may
be a delay of several GCLK_CAN_APB periods between writing to TEST.TX until the new configuration is
visible at output pin CAN_TX. This applies also when reading input pin CAN_RX via TEST.RX.
Note: Test modes should be used for production tests or self test only. The software control for pin
CAN_TX interferes with all CAN protocol functions. It is not recommended to use test modes for
application.
External Loop Back Mode
The CAN can be set in External Loop Back Mode by programming TEST.LBCK to ‘1’. In Loop Back
Mode, the CAN treats its own transmitted messages as received messages and stores them (if they pass
acceptance filtering) into an Rx Buffer or an Rx FIFO. The figure below shows the connection of signals
CAN_TX and CAN_RX to the CAN in External Loop Back Mode.
This mode is provided for hardware self-test. To be independent from external stimulation, the CAN
ignores acknowledge errors (recessive bit sampled in the acknowledge slot of a data/remote frame) in
Loop Back Mode. In this mode the CAN performs an internal feedback from its Tx output to its Rx input.
The actual value of the CAN_RX input pin is disregarded by the CAN. The transmitted messages can be
monitored at the CAN_TX pin.
Internal Loop Back Mode
Internal Loop Back Mode is entered by programming bits TEST.LBCK and CCCR.MON to ‘1’. This mode
can be used for a “Hot Selftest”, meaning the CAN can be tested without affecting a running CAN system
connected to the pins CAN_TX and CAN_RX. In this mode pin CAN_RX is disconnected from the CAN
and pin CAN_TX is held recessive. The figure below shows the connection of CAN_TX and CAN_RX to
the CAN in case of Internal Loop Back Mode.
SAM D5x/E5x Family Data Sheet
CAN - Control Area Network
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1212