Datasheet

Table Of Contents
12.12 Register Summary
Offset Name Bit Pos.
0x00 CTRL 7:0 CE MBIST CRC SWRST
0x01 STATUSA 7:0 PERR FAIL BERR CRSTEXT DONE
0x02 STATUSB 7:0 CELCK HPE DCCD1 DCCD0 DBGPRES PROT
0x03 Reserved
0x04 ADDR
7:0 ADDR[5:0] AMOD[1:0]
15:8 ADDR[13:6]
23:16 ADDR[21:14]
31:24 ADDR[29:22]
0x08 LENGTH
7:0 LENGTH[5:0]
15:8 LENGTH[13:6]
23:16 LENGTH[21:14]
31:24 LENGTH[29:22]
0x0C DATA
7:0 DATA[7:0]
15:8 DATA[15:8]
23:16 DATA[23:16]
31:24 DATA[31:24]
0x10 DCC0
7:0 DATA[7:0]
15:8 DATA[15:8]
23:16 DATA[23:16]
31:24 DATA[31:24]
0x14 DCC1
7:0 DATA[7:0]
15:8 DATA[15:8]
23:16 DATA[23:16]
31:24 DATA[31:24]
0x18 DID
7:0 DEVSEL[7:0]
15:8 DIE[3:0] REVISION[3:0]
23:16 FAMILY[0:0] SERIES[5:0]
31:24 PROCESSOR[3:0] FAMILY[4:1]
0x1C CFG
7:0 ETBRAMEN DCCDMALEVEL[1:0] LQOS[1:0]
15:8
23:16
31:24
0x20
...
0xEF
Reserved
0xF0 DCFG0
7:0 DCFG[7:0]
15:8 DCFG[15:8]
23:16 DCFG[23:16]
31:24 DCFG[31:24]
0xF4 DCFG1
7:0 DCFG[7:0]
15:8 DCFG[15:8]
23:16 DCFG[23:16]
31:24 DCFG[31:24]
SAM D5x/E5x Family Data Sheet
DSU - Device Service Unit
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 116