Datasheet

Table Of Contents
Value Name Description
0x4
12BITS 12-bits transfer
0x5
13BITS 13-bits transfer
0x6
14BITS 14-bits transfer
0x7
15BITS 15-bits transfer
0x8
16BITS 16-bits transfer
0x9-0xF
Reserved
Bits 5:4 – CSMODE[1:0] Chip Select Mode
The CSMODE field determines how the chip select is de-asserted.
Value Name Description
0x0
NORELOAD The chip select is de-asserted if TD has not been reloaded before the
end of the current transfer.
0x1
LASTXFER The chip select is de-asserted when the bit LASTXFER is written at 1
and the character written in TD has been transferred.
0x2
SYSTEMATICALLY The chip select is de-asserted systematically after each transfer.
0x3
Reserved
Bit 3 – SMEMREG Serial Memory Register Mode
Value Description
0
Serial memory registers are written via AHB access.
1
Serial memory registers are written via APB access. Reset the QSPI.
Bit 2 – WDRBT Wait Data Read Before Transfer
This bit determines the Wait Data Read Before Transfer option.
Bit 1 – LOOPEN Local Loopback Enable
This bit defines if the Local Loopback is enabled or disabled.
LOOPEN controls the local loopback on the data serializer for testing in SPI Mode only. (MISO is
internally connected on MOSI).
Value Description
0
Local Loopback is disabled.
1
Local Loopback is enabled.
Bit 0 – MODE Serial Memory Mode
This bit defines if the QSPI is in SPI Mode or Serial Memory Mode.
Value Name Description
0
SPI SPI operating mode
1
MEMORY Serial Memory operating mode
SAM D5x/E5x Family Data Sheet
QSPI - Quad Serial Peripheral Interface
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1090