Datasheet

Figure 37-10. Instruction Transmission Flow Diagram
Instruction frame
with address
?
Read memory
transfer
(TFRTYP = 1)
?
Read DATA in the QSPI AHB
memory space.
If accesses are not sequential
a new instruction is sent
automatically.
Yes
No
Read/Write DATA in the QSPI
AHB memory space.
Address of accesses are not
used by the QSPI.
No
Yes
Yes
No
START
END
Write the address
in INSTRADDR
Yes
No
Yes
No
Instruction frame
but no data
?
with address
Instruction frame
option code
?
with instruction code and/or
Write the instruction code
and/or the option code
in INSTRCTRL
Instruction frame
?
with data
Configure and send instruction
frame by writing INSTRFRAME
Read INSTRFRAME
to synchronize APB and AHB
accesses
Read/Write DATA in the QSPI
AHB memory space
(SMEMREG = 0) or APB
register space (SMEMREG = 1).
The address of the first access
is sent after the instruction code.
Write CTRLA.LASTXFR to 1
when all data have been
transferred.
Wait for INTFLAG.INSTREND
to rise by polling or interrupt.
Depending on CSMODE configuration
to rise by polling or interrupt.
wait for INTFLAG.CSRISE
SAM D5x/E5x Family Data Sheet
QSPI - Quad Serial Peripheral Interface
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1079