Datasheet

12. DSU - Device Service Unit
12.1 Overview
The Device Service Unit (DSU) provides a means of detecting debugger probes. It enables the ARM
Debug Access Port (DAP) to have control over multiplexed debug pads and CPU Reset. The DSU also
provides system-level services to debug adapters in an ARM debug system. It implements a CoreSight
Debug ROM that provides device identification as well as identification of other debug components within
the system. Hence, it complies with the ARM Peripheral Identification specification. The DSU also
provides system services to applications that need memory testing, as required for IEC60730 Class B
compliance, for example. The DSU can be accessed simultaneously by a debugger and the CPU, as it is
connected on the High-Speed Bus Matrix. For security reasons, some of the DSU features will be limited
or unavailable when the device is protected by the NVMCTRL security bit.
Related Links
25. NVMCTRL – Nonvolatile Memory Controller
12.2 Features
• CPU Reset Extension
• Debugger Probe Detection (Cold- and Hot-Plugging)
• Chip-Erase Command and Status
• 32-Bit Cyclic Redundancy Check (CRC32) of any Memory Accessible Through the Bus Matrix
• ARM
®
CoreSight
™
Compliant Device Identification
• Two Debug Communications Channels with DMA Connection
• Debug Access Port Security Filter
• Onboard Memory Built-in Self-test (MBIST)
SAM D5x/E5x Family Data Sheet
DSU - Device Service Unit
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 103