Data Sheet

MacroGiga Electronics Ltd. Co.
Revision: 1.3 MacroGiga Electronics Ltd. Co. Confidential
5. Data and Control Interface
The data and control interface gives you access to all the features in the chip. The data and control
interface consists of the following digital signals:
• IRQ (this signal is active low and is controlled by maskable interrupt sources)
• CSN (SPI signal)
• SCK (SPI signal)
• MOSI (SPI signal)
• MISO (SPI signal)
5.1 Features
• 4-wire SPI serial interface, as slave
• up to 10Mbps data rate
• Easily configurable register map
5.2 Functional Description
The SPI is a standard SPI with a maximum data rate of 10Mbps.
5.3 SPI Timing
The interface supports SPI. SPI operation and timing is given in Figure 5.3.1 and Figure 5.3.2. The
device must be in one of the standby modes or sleep mode before writing to the configuration registers.
Figure 5.3.1 SPI read operation