Datasheet

Spartan-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS189 (v1.9) March 13, 2019 www.xilinx.com
Product Specification 24
Input/Output Logic Switching Characteristics
Table 21: ILOGIC Switching Characteristics
Symbol Description
V
CCINT
Operating Voltage and
Speed Grade
Units
1.0V 0.95V
-2 -1 -1L
Setup/Hold
T
ICE1CK
/T
ICKCE1
CE1 pin setup/hold with respect to CLK. 0.54/0.02 0.76/0.02 0.76/0.02 ns
T
ISRCK
/T
ICKSR
SR pin setup/hold with respect to CLK. 0.70/0.01 1.13/0.01 1.13/0.01 ns
T
IDOCK
/T
IOCKD
D pin setup/hold with respect to CLK without
delay.
0.01/0.29 0.01/0.33 0.01/0.33 ns
T
IDOCKD
/T
IOCKDD
DDLY pin setup/hold with respect to CLK (using
IDELAY).
0.02/0.29 0.02/0.33 0.02/0.33 ns
Combinatorial
T
IDI
D pin to O pin propagation delay, no delay. 0.11 0.13 0.13 ns
T
IDID
DDLY pin to O pin propagation delay (using
IDELAY).
0.12 0.14 0.14 ns
Sequential Delays
T
IDLO
D pin to Q1 pin using flip-flop as a latch without
delay.
0.44 0.51 0.51 ns
T
IDLOD
DDLY pin to Q1 pin using flip-flop as a latch (using
IDELAY).
0.44 0.51 0.51 ns
T
ICKQ
CLK to Q outputs. 0.57 0.66 0.66 ns
T
RQ_ILOGIC
SR pin to OQ/TQ out. 1.08 1.32 1.32 ns
T
GSRQ_ILOGIC
Global set/reset to Q outputs. 7.60 10.51 10.51 ns
Set/Reset
T
RPW_ILOGIC
Minimum pulse width, SR inputs. 0.72 0.72 0.72 ns, Min
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