Datasheet
Table Of Contents
- Spartan-7 FPGAs Data Sheet: DC and AC Switching Characteristics
- Introduction
- DC Characteristics
- Power-On/Off Power Supply Sequencing
- DC Input and Output Levels
- AC Switching Characteristics
- Performance Characteristics
- IOB Pad Input/Output/3-State
- I/O Standard Adjustment Measurement Methodology
- Input/Output Logic Switching Characteristics
- Input Serializer/Deserializer Switching Characteristics
- Output Serializer/Deserializer Switching Characteristics
- Input/Output Delay Switching Characteristics
- CLB Switching Characteristics
- CLB Distributed RAM Switching Characteristics (SLICEM Only)
- CLB Shift Register Switching Characteristics (SLICEM Only)
- Block RAM and FIFO Switching Characteristics
- DSP48E1 Switching Characteristics
- Clock Buffers and Networks
- MMCM Switching Characteristics
- PLL Switching Characteristics
- Device Pin-to-Pin Output Parameter Guidelines
- Device Pin-to-Pin Input Parameter Guidelines
- Additional Package Parameter Guidelines
- XADC Specifications
- Configuration Switching Characteristics
- eFUSE Programming Conditions
- References
- Revision History
- Please Read: Important Legal Notices
Spartan-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS189 (v1.9) March 13, 2019 www.xilinx.com
Product Specification 22
Output Delay Measurements
Output delays are measured with short output traces. Standard termination was used for all testing. The
propagation delay of the trace is characterized separately and subtracted from the final measurement, and
is therefore not included in the generalized test setups shown in Figure 1 and Figure 2.
Parameters V
REF
, R
REF
, C
REF
, and V
MEAS
fully describe the test conditions for each I/O standard. The most
accurate prediction of propagation delay in any given application can be obtained through IBIS
simulation, using this method:
1. Simulate the output driver of choice into the generalized test setup using values from Table 20.
2. Record the time to V
MEAS
.
3. Simulate the output driver of choice into the actual PCB trace and load using the appropriate IBIS
model or capacitance value to represent the load.
4. Record the time to V
MEAS
.
5. Compare the results of step 2 and step 4. The increase or decrease in delay yields the actual
propagation delay of the PCB trace.
X-Ref Target - Figure 1
Figure 1: Single-ended Test Setup
X-Ref Target - Figure 2
Figure 2: Differential Test Setup
V
REF
R
REF
V
MEAS
(voltage level when taking delay measurement)
C
REF
(probe capacitance)
Output
X16654-092616
R
REF
V
MEAS
+
–
C
REF
Output
X16640-092616
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