Datasheet

2.4.8. List of Registers
Table 117. List of
M0PLUS registers
Offset Name Info
0xe010 SYST_CSR SysTick Control and Status Register
0xe014 SYST_RVR SysTick Reload Value Register
0xe018 SYST_CVR SysTick Current Value Register
0xe01c SYST_CALIB SysTick Calibration Value Register
0xe100 NVIC_ISER Interrupt Set-Enable Register
0xe180 NVIC_ICER Interrupt Clear-Enable Register
0xe200 NVIC_ISPR Interrupt Set-Pending Register
0xe280 NVIC_ICPR Interrupt Clear-Pending Register
0xe400 NVIC_IPR0 Interrupt Priority Register 0
0xe404 NVIC_IPR1 Interrupt Priority Register 1
0xe408 NVIC_IPR2 Interrupt Priority Register 2
0xe40c NVIC_IPR3 Interrupt Priority Register 3
0xe410 NVIC_IPR4 Interrupt Priority Register 4
0xe414 NVIC_IPR5 Interrupt Priority Register 5
0xe418 NVIC_IPR6 Interrupt Priority Register 6
0xe41c NVIC_IPR7 Interrupt Priority Register 7
0xed00 CPUID CPUID Base Register
0xed04 ICSR Interrupt Control and State Register
0xed08 VTOR Vector Table Offset Register
0xed0c AIRCR Application Interrupt and Reset Control Register
0xed10 SCR System Control Register
0xed14 CCR Configuration and Control Register
0xed1c SHPR2 System Handler Priority Register 2
0xed20 SHPR3 System Handler Priority Register 3
0xed24 SHCSR System Handler Control and State Register
0xed90 MPU_TYPE MPU Type Register
0xed94 MPU_CTRL MPU Control Register
0xed98 MPU_RNR MPU Region Number Register
0xed9c MPU_RBAR MPU Region Base Address Register
0xeda0 MPU_RASR MPU Region Attribute and Size Register
SYST_CSR Register
Description
Use the SysTick Control and Status Register to enable the SysTick features.
RP2040 Datasheet
2.4. Cortex-M0+ 91