Datasheet

Description
SPI control
Table 635.
SPI_CTRLR0 Register
Bits Name Description Type Reset
31:24 XIP_CMD SPI Command to send in XIP mode (INST_L = 8-bit) or to
append to Address (INST_L = 0-bit)
RW 0x03
23:19 Reserved. - - -
18 SPI_RXDS_EN Read data strobe enable RW 0x0
17 INST_DDR_EN Instruction DDR transfer enable RW 0x0
16 SPI_DDR_EN SPI DDR transfer enable RW 0x0
15:11 WAIT_CYCLES Wait cycles between control frame transmit and data
reception (in SCLK cycles)
RW 0x00
10 Reserved. - - -
9:8 INST_L Instruction length (0/4/8/16b)
0x0 -> No instruction
0x1 -> 4-bit instruction
0x2 -> 8-bit instruction
0x3 -> 16-bit instruction
RW 0x0
7:6 Reserved. - - -
5:2 ADDR_L Address length (0b-60b in 4b increments) RW 0x0
1:0 TRANS_TYPE Address and instruction transfer format
0x0 -> Command and address both in standard SPI frame
format
0x1 -> Command in standard SPI format, address in format
specified by FRF
0x2 -> Command and address both in format specified by
FRF (e.g. Dual-SPI)
RW 0x0
TXD_DRIVE_EDGE Register
Description
TX drive edge
Table 636.
TXD_DRIVE_EDGE
Register
Bits Name Description Type Reset
31:8 Reserved. - - -
7:0 TDE TXD drive edge RW 0x00
RP2040 Datasheet
4.11. SSI 627