Datasheet

Table Of Contents
Bits Name Description Type Reset
2 RXUIM Receive FIFO underflow interrupt mask RW 0x0
1 TXOIM Transmit FIFO overflow interrupt mask RW 0x0
0 TXEIM Transmit FIFO empty interrupt mask RW 0x0
ISR Register
Description
Interrupt status
Table 621. ISR
Register
Bits Name Description Type Reset
31:6 Reserved. - - -
5 MSTIS Multi-master contention interrupt status RO 0x0
4 RXFIS Receive FIFO full interrupt status RO 0x0
3 RXOIS Receive FIFO overflow interrupt status RO 0x0
2 RXUIS Receive FIFO underflow interrupt status RO 0x0
1 TXOIS Transmit FIFO overflow interrupt status RO 0x0
0 TXEIS Transmit FIFO empty interrupt status RO 0x0
RISR Register
Description
Raw interrupt status
Table 622. RISR
Register
Bits Name Description Type Reset
31:6 Reserved. - - -
5 MSTIR Multi-master contention raw interrupt status RO 0x0
4 RXFIR Receive FIFO full raw interrupt status RO 0x0
3 RXOIR Receive FIFO overflow raw interrupt status RO 0x0
2 RXUIR Receive FIFO underflow raw interrupt status RO 0x0
1 TXOIR Transmit FIFO overflow raw interrupt status RO 0x0
0 TXEIR Transmit FIFO empty raw interrupt status RO 0x0
TXOICR Register
Description
TX FIFO overflow interrupt clear
Table 623. TXOICR
Register
Bits Name Description Type Reset
31:1 Reserved. - - -
0 NONAME Clear-on-read transmit FIFO overflow interrupt RO 0x0
RXOICR Register
RP2040 Datasheet
4.11. SSI 624