Datasheet

Tx FIFO Buffer
FIFO Status Prior to
Transfer
FIFO Status on
Completion of Transfer
Rx FIFO Buffer
Location n
Location 3
Location 2
Location 1
Location 0
Location n
Location 3
Location 2
Location 1
Location 0
Write DR
NULL
NULL SHIFT LOGIC
NULL
Ctrl Word(1)
Ctrl Word(0)
Rx FIFO Empty
rxd
txd
NULL
NULL
Rx_Data(1)
Rx_Data(0)
NULL
Tx FIFO Empty
Read DR
0
MWHS
MWCR
0
MDD
0
MWMOD
Figure 133. FIFO
Status for
Nonsequential
Microwire Transfer
(receiving data frame)
During sequential continuous transfers, only one control word is transmitted from the DW_apb_ssi master. The transfer is
started in the same manner as with nonsequential read operations, but the cycle is continued to read further data. The
slave device automatically increments its address pointer to the next location and continues to provide data from that
location. Any number of locations can be read in this manner; the DW_apb_ssi master terminates the transfer when the
number of words received is equal to the value in the CTRLR1 register plus one.
The timing diagram in Figure 134 and example in Figure 135 show a continuous sequential read of two data frames from
the external slave device.
sclk_out
txd
rxd
ss_0_n
ssi_oe_n
MSB LSB
Control word
MSBLSB0 MSB LSB
Data Word 0 Data Word 1
Figure 134.
Continuous Sequential
Microwire Transfer
(receiving data frame)
Tx FIFO Buffer
FIFO Status Prior to
Transfer
FIFO Status on
Completion of Transfer
Rx FIFO Buffer
Location n
Location 3
Location 2
Location 1
Location 0
Location n
Location 3
Location 2
Location 1
Location 0
Write DR
NULL
NULL SHIFT LOGIC
NULL
NULL
Ctrl Word(0)
Rx FIFO Empty
rxd
txd
NULL
NULL
Rx_Data(1)
Rx_Data(0)
NULL
Tx FIFO Empty
Read DR
0
MWHS
MWCR
0
MDD
1
MWMOD
Figure 135. FIFO
Status for Sequential
Microwire Transfer
(receiving data frame)
When MDD = 1, this indicates that the DW_apb_ssi serial master transmits data to the external serial slave. Immediately
after the LSB of the control word is transmitted, the DW_apb_ssi master begins transmitting the data frame to the slave
peripheral.
Figure 136 shows the timing diagram for a single DW_apb_ssi serial master write to an external serial slave.
RP2040 Datasheet
4.11. SSI 607