Datasheet
Table Of Contents
- RP2040 Datasheet
- Colophon
- Chapter 1. Introduction
- Chapter 2. System Description
- 2.1. Bus Fabric
- 2.2. Address Map
- 2.3. Processor subsystem
- 2.4. Cortex-M0+
- 2.4.1. Features
- 2.4.2. Functional Description
- 2.4.3. Programmer’s model
- 2.4.4. System control
- 2.4.5. NVIC
- 2.4.6. MPU
- 2.4.7. Debug
- 2.4.8. List of Registers
- 2.5. Memory
- 2.6. Boot Sequence
- 2.7. Bootrom
- 2.7.1. Bootrom Source
- 2.7.2. Processor Controlled Boot Sequence
- 2.7.3. Bootrom Contents
- 2.7.4. USB Mass Storage Interface
- 2.7.5. USB PICOBOOT Interface
- 2.8. Power Supplies
- 2.9. On-Chip Voltage Regulator
- 2.10. Power Control
- 2.11. Chip-Level Reset
- 2.12. Power-On State Machine
- 2.13. Subsystem Resets
- 2.14. Clocks
- 2.14.1. Overview
- 2.14.2. Clock sources
- 2.14.2.1. Ring Oscillator
- 2.14.2.1.1. Mitigating ROSC frequency variation due to process
- 2.14.2.1.2. Mitigating ROSC frequency variation due to voltage
- 2.14.2.1.3. Mitigating ROSC frequency variation due to temperature
- 2.14.2.1.4. Automatic mitigation of ROSC frequency variation due to PVT
- 2.14.2.1.5. Automatic overclocking using the ROSC
- 2.14.2.2. Crystal Oscillator
- 2.14.2.3. External Clocks
- 2.14.2.4. Relaxation Oscillators
- 2.14.2.5. PLLs
- 2.14.2.1. Ring Oscillator
- 2.14.3. Clock Generators
- 2.14.4. Frequency Counter
- 2.14.5. Resus
- 2.14.6. Programmer’s Model
- 2.14.7. List of registers
- 2.15. Crystal Oscillator (XOSC)
- 2.16. Ring Oscillator (ROSC)
- 2.17. PLL
- 2.18. GPIO
- 2.19. Sysinfo
- 2.20. Syscfg
- Chapter 3. PIO
- Chapter 4. Peripherals
- 4.1. USB
- 4.2. DMA
- 4.3. UART
- 4.4. I2C
- 4.4.1. Features
- 4.4.2. IP Configuration
- 4.4.3. I2C Overview
- 4.4.4. I2C Terminology
- 4.4.5. I2C Behaviour
- 4.4.6. I2C Protocols
- 4.4.7. Tx FIFO Management and START, STOP and RESTART Generation
- 4.4.8. Multiple Master Arbitration
- 4.4.9. Clock Synchronization
- 4.4.10. Operation Modes
- 4.4.11. Spike Suppression
- 4.4.12. Fast Mode Plus Operation
- 4.4.13. Bus Clear Feature
- 4.4.14. IC_CLK Frequency Configuration
- 4.4.15. DMA Controller Interface
- 4.4.16. List of Registers
- 4.5. SPI
- 4.5.1. Overview
- 4.5.2. Functional Description
- 4.5.3. Operation
- 4.5.3.1. Interface reset
- 4.5.3.2. Configuring the SSP
- 4.5.3.3. Enable PrimeCell SSP operation
- 4.5.3.4. Clock ratios
- 4.5.3.5. Programming the SSPCR0 Control Register
- 4.5.3.6. Programming the SSPCR1 Control Register
- 4.5.3.7. Frame format
- 4.5.3.8. Texas Instruments synchronous serial frame format
- 4.5.3.9. Motorola SPI frame format
- 4.5.3.10. Motorola SPI Format with SPO=0, SPH=0
- 4.5.3.11. Motorola SPI Format with SPO=0, SPH=1
- 4.5.3.12. Motorola SPI Format with SPO=1, SPH=0
- 4.5.3.13. Motorola SPI Format with SPO=1, SPH=1
- 4.5.3.14. National Semiconductor Microwire frame format
- 4.5.3.15. Examples of master and slave configurations
- 4.5.3.16. PrimeCell DMA interface
- 4.5.4. List of Registers
- 4.6. PWM
- 4.7. Timer
- 4.8. Watchdog
- 4.9. RTC
- 4.10. ADC and Temperature Sensor
- 4.11. SSI
- 4.11.1. Overview
- 4.11.2. Features
- 4.11.3. IP Modifications
- 4.11.4. Clock Ratios
- 4.11.5. Transmit and Receive FIFO Buffers
- 4.11.6. 32-Bit Frame Size Support
- 4.11.7. SSI Interrupts
- 4.11.8. Transfer Modes
- 4.11.9. Operation Modes
- 4.11.10. Partner Connection Interfaces
- 4.11.11. DMA Controller Interface
- 4.11.12. APB Interface
- 4.11.13. List of Registers
- Chapter 5. Electrical and Mechanical
- Appendix A: Register Field Types
- Appendix B: Errata
40
41 static void alarm_in_us(uint32_t delay_us) {
42 // Enable the interrupt for our alarm (the timer outputs 4 alarm irqs)
43 hw_set_bits(&timer_hw->inte, 1u << ALARM_NUM);
44 // Set irq handler for alarm irq
45 irq_set_exclusive_handler(ALARM_IRQ, alarm_irq);
46 // Enable the alarm irq
47 irq_enable(ALARM_IRQ, true);
48 // Enable interrupt in block and at processor
49
50 // Alarm is only 32 bits so if trying to delay more
51 // than that need to be careful and keep track of the upper
52 // bits
53 uint64_t target = timer_hw->timerawl + delay_us;
54
55 // Write the lower 32 bits of the target time to the alarm which
56 // will arm it
57 timer_hw->alarm[ALARM_NUM] = (uint32_t) target;
58 }
59
60 int main() {
61 setup_default_uart();
62 printf("Timer lowlevel!\n");
63
64 // Set alarm every 2 seconds
65 while (1) {
66 alarm_fired = false;
67 alarm_in_us(1000000 * 2);
68 // Wait for alarm to fire
69 while (!alarm_fired);
70 }
71 }
4.7.4.3. Busy wait
If you don’t want to use an alarm to wait for a period of time, instead use a while loop. The Pico SDK provides various
busy_wait_ functions to do this:
Pico SDK: https://github.com/raspberrypi/pico-sdk/tree/pre_release/src/rp2_common/hardware_timer/timer.c Lines 53 - 81
53 void busy_wait_us_31(uint32_t delay_us) {
54 // we only allow 31 bits, otherwise we could have a race in the loop below with
55 // values very close to 2^32
56 assert(0 <= (int32_t)delay_us);
57 uint32_t start = timer_hw->timerawl;
58 while (timer_hw->timerawl - start < delay_us) {
59 tight_loop_contents();
60 }
61 }
62
63 void busy_wait_us(uint64_t delay_us) {
64 absolute_time_t t;
65 update_us_since_boot(&t, time_us_64() + delay_us);
66 busy_wait_until(t);
67 }
68
69 void busy_wait_until(absolute_time_t t) {
70 uint64_t target = to_us_since_boot(t);
71 uint32_t hi_target = target >> 32u;
72 uint32_t hi = timer_hw->timerawh;
RP2040 Datasheet
4.7. Timer 561