Datasheet

Description
Divider unsigned divisor
Write to the DIVISOR operand of the divider, i.e. the q in p / q.
Any operand write starts a new calculation. The results appear in QUOTIENT, REMAINDER.
UDIVIDEND/SDIVIDEND are aliases of the same internal register. The U alias starts an
unsigned calculation, and the S alias starts a signed calculation.
Table 40.
DIV_UDIVISOR
Register
Bits Name Description Type Reset
31:0 NONAME RW 0x00000000
DIV_SDIVIDEND Register
Description
Divider signed dividend
The same as UDIVIDEND, but starts a signed calculation, rather than unsigned.
Table 41.
DIV_SDIVIDEND
Register
Bits Name Description Type Reset
31:0 NONAME RW 0x00000000
DIV_SDIVISOR Register
Description
Divider signed divisor
The same as UDIVISOR, but starts a signed calculation, rather than unsigned.
Table 42.
DIV_SDIVISOR
Register
Bits Name Description Type Reset
31:0 NONAME RW 0x00000000
DIV_QUOTIENT Register
Description
Divider result quotient
The result of DIVIDEND / DIVISOR (division). Contents undefined while CSR_READY is low.
For signed calculations, QUOTIENT is negative when the signs of DIVIDEND and DIVISOR differ.
This register can be written to directly, for context save/restore purposes. This halts any
in-progress calculation and sets the CSR_READY and CSR_DIRTY flags.
Reading from QUOTIENT clears the CSR_DIRTY flag, so should read results in the order
REMAINDER, QUOTIENT if CSR_DIRTY is used.
Table 43.
DIV_QUOTIENT
Register
Bits Name Description Type Reset
31:0 NONAME RW 0x00000000
DIV_REMAINDER Register
Description
Divider result remainder
The result of DIVIDEND % DIVISOR (modulo). Contents undefined while CSR_READY is low.
For signed calculations, REMAINDER is negative only when DIVIDEND is negative.
This register can be written to directly, for context save/restore purposes. This halts any
in-progress calculation and sets the CSR_READY and CSR_DIRTY flags.
RP2040 Datasheet
2.3. Processor subsystem 55