Datasheet

Clock
2
0 1 2 3 4 5
DIV_INT
Count
0 1 2 3 4 5 6
Count
DIV_INT
CSR_PH_ADV
2
Clock enable
Clock enable
0 1 2 3 4
Count
DIV_INT
CSR_PH_ADV
2
Clock enable
Figure 111. The clock
enable signal, output
by the clock divider,
controls the rate of
counting. Phase
advance forces the
clock enable high on
cycles where it is low,
causing the counter to
jump forward by one
count. Phase retard
forces the clock
enable low when it
would be high, holding
the counter back by
one count.
The counter can not count faster than once per cycle, so PH_ADV requires DIV_INT > 1 or DIV_FRAC > 0. Likewise, the counter
will not start to count backward if PH_RET is asserted when the clock enable is permanently low.
To advance or retard the phase by one count, software writes 1 to PH_ADV or PH_RET. Once an enable pulse has been
inserted or deleted, the PH_ADV or PH_RET register bit will return to 0, and software can poll the CSR until this happens. PH_ADV
will always insert a pulse into the next available gap, and PH_RET will always delete the next available pulse.
4.6.3. List Of Registers
Table 544. List of
PWM registers
Offset Name Info
0x00 CH0_CSR Control and status register
0x04 CH0_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x08 CH0_CTR Direct access to the PWM counter
0x0c CH0_CC Counter compare values
0x10 CH0_TOP Counter wrap value
0x14 CH1_CSR Control and status register
0x18 CH1_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x1c CH1_CTR Direct access to the PWM counter
0x20 CH1_CC Counter compare values
0x24 CH1_TOP Counter wrap value
0x28 CH2_CSR Control and status register
0x2c CH2_DIV INT and FRAC form a fixed-point fractional number.
Counting rate is system clock frequency divided by this number.
Fractional division uses simple 1st-order sigma-delta.
0x30 CH2_CTR Direct access to the PWM counter
0x34 CH2_CC Counter compare values
RP2040 Datasheet
4.6. PWM 553