Datasheet

Table Of Contents
Description
Control register 0, SSPCR0 on page 3-4
Table 525. SSPCR0
Register
Bits Name Description Type Reset
31:16 Reserved. - - -
15:8 SCR Serial clock rate. The value SCR is used to generate the
transmit and receive bit rate of the PrimeCell SSP. The bit
rate is: F SSPCLK CPSDVSR x (1+SCR) where CPSDVSR is
an even value from 2-254, programmed through the
SSPCPSR register and SCR is a value from 0-255.
RW 0x00
7 SPH SSPCLKOUT phase, applicable to Motorola SPI frame
format only. See Motorola SPI frame format on page 2-10.
RW 0x0
6 SPO SSPCLKOUT polarity, applicable to Motorola SPI frame
format only. See Motorola SPI frame format on page 2-10.
RW 0x0
5:4 FRF Frame format: 00 Motorola SPI frame format. 01 TI
synchronous serial frame format. 10 National Microwire
frame format. 11 Reserved, undefined operation.
RW 0x0
3:0 DSS Data Size Select: 0000 Reserved, undefined operation. 0001
Reserved, undefined operation. 0010 Reserved, undefined
operation. 0011 4-bit data. 0100 5-bit data. 0101 6-bit data.
0110 7-bit data. 0111 8-bit data. 1000 9-bit data. 1001 10-
bit data. 1010 11-bit data. 1011 12-bit data. 1100 13-bit
data. 1101 14-bit data. 1110 15-bit data. 1111 16-bit data.
RW 0x0
SSPCR1 Register
Description
Control register 1, SSPCR1 on page 3-5
Table 526. SSPCR1
Register
Bits Name Description Type Reset
31:4 Reserved. - - -
3 SOD Slave-mode output disable. This bit is relevant only in the
slave mode, MS=1. In multiple-slave systems, it is possible
for an PrimeCell SSP master to broadcast a message to all
slaves in the system while ensuring that only one slave
drives data onto its serial output line. In such systems the
RXD lines from multiple slaves could be tied together. To
operate in such systems, the SOD bit can be set if the
PrimeCell SSP slave is not supposed to drive the SSPTXD
line: 0 SSP can drive the SSPTXD output in slave mode. 1
SSP must not drive the SSPTXD output in slave mode.
RW 0x0
2 MS Master or slave mode select. This bit can be modified only
when the PrimeCell SSP is disabled, SSE=0: 0 Device
configured as master, default. 1 Device configured as
slave.
RW 0x0
1 SSE Synchronous serial port enable: 0 SSP operation disabled. 1
SSP operation enabled.
RW 0x0
0 LBM Loop back mode: 0 Normal serial port operation enabled. 1
Output of transmit serial shifter is connected to input of
receive serial shifter internally.
RW 0x0
RP2040 Datasheet
4.5. SPI 541