Datasheet

SSPFSSOUT pin is returned to its idle state one SSPCLKOUT period after the last bit has been captured.
4.5.3.11. Motorola SPI Format with SPO=0, SPH=1
Figure 90 shows the transfer signal sequence for Motorola SPI format with SPO=0, SPH=1, and it covers both single and
continuous transfers.
SSPCLKOUT/SSPCLIN
SSPFSSOUT/SSPFSSIN
SSPRXD
MSB LSBQ Q
SSPRXD
MSB LSB
4 to 16 bits
nSSPOE
Figure 90. Motorola
SPI frame format with
SPO=0 and SPH=1,
single and continuous
transfers
In this configuration, during idle periods:
•
the SSPCLKOUT signal is forced LOW
•
The SSPFSSOUT signal is forced HIGH
•
the transmit data line SSPTXD is arbitrarily forced LOW
•
the nSSPOE pad enable signal is forced HIGH, making the transmit pad high impedance
•
when the PrimeCell SSP is configured as a master, the nSSPCTLOE line is driven LOW, enabling the SSPCLKOUT
pad, active-LOW enable
•
when the PrimeCell SSP is configured as a slave, the nSSPCTLOE line is driven HIGH, disabling the SSPCLKOUT pad,
active-LOW enable.
If the PrimeCell SSP is enabled, and there is valid data within the transmit FIFO, the start of transmission is signified by the
SSPFSSOUT master signal being driven LOW. The nSSPOE line is driven LOW, enabling the master SSPTXD output pad.
After an additional one half SSPCLKOUT period, both master and slave valid data is enabled onto their respective
transmission lines. At the same time, the SSPCLKOUT is enabled with a rising edge transition.
Data is then captured on the falling edges and propagated on the rising edges of the SSPCLKOUT signal.
In the case of a single word transfer, after all bits have been transferred, the SSPFSSOUT line is returned to its idle HIGH
state one SSPCLKOUT period after the last bit has been captured. For continuous back-to-back transfers, the SSPFSSOUT
pin is held LOW between successive data words and termination is the same as that of the single word transfer.
4.5.3.12. Motorola SPI Format with SPO=1, SPH=0
Figure 91 and Figure 92 show single and continuous transmission signal sequences for Motorola SPI format with SPO=1,
SPH=0.
Figure 91 shows a single transmission signal sequence for Motorola SPI format with SPO=1, SPH=0.
SSPCLKOUT/SSPCLIN
SSPFSSOUT/SSPFSSIN
SSPRXD
MSB LSB Q
SSPRXD
MSB LSB
4 to 16 bits
nSSPOE
Figure 91. Motorola
SPI frame format,
single transfer, with
SPO=1 and SPH=0
Figure 92 shows a continuous transmission signal sequence for Motorola SPI format with SPO=1, SPH=0.
RP2040 Datasheet
4.5. SPI 534