Datasheet

Table 23. GPIO_OE
Register
Bits Name Description Type Reset
31:30 Reserved. - - -
29:0 NONAME Set output enable (1/0 -> output/input) for GPIO0…29.
Reading back gives the last value written.
If core 0 and core 1 both write to GPIO_OE simultaneously
(or to a SET/CLR/XOR alias),
the result is as though the write from core 0 took place
first,
and the write from core 1 was then applied to that
intermediate result.
RW 0x00000000
GPIO_OE_SET Register
Description
GPIO output enable set
Table 24.
GPIO_OE_SET Register
Bits Name Description Type Reset
31:30 Reserved. - - -
29:0 NONAME
Perform an atomic bit-set on GPIO_OE, i.e. GPIO_OE |= wdata
RW 0x00000000
GPIO_OE_CLR Register
Description
GPIO output enable clear
Table 25.
GPIO_OE_CLR Register
Bits Name Description Type Reset
31:30 Reserved. - - -
29:0 NONAME
Perform an atomic bit-clear on GPIO_OE, i.e. GPIO_OE &=
~wdata
RW 0x00000000
GPIO_OE_XOR Register
Description
GPIO output enable XOR
Table 26.
GPIO_OE_XOR
Register
Bits Name Description Type Reset
31:30 Reserved. - - -
29:0 NONAME
Perform an atomic bitwise XOR on GPIO_OE, i.e. GPIO_OE ^=
wdata
RW 0x00000000
GPIO_HI_OUT Register
Description
QSPI output value
RP2040 Datasheet
2.3. Processor subsystem 51