Datasheet

Bits Name Description Type Reset
3 R_TX_OVER See IC_RAW_INTR_STAT for a detailed description of
R_TX_OVER bit.
Reset value: 0x0
0x0 -> R_TX_OVER interrupt is inactive
0x1 -> R_TX_OVER interrupt is active
RO 0x0
2 R_RX_FULL See IC_RAW_INTR_STAT for a detailed description of
R_RX_FULL bit.
Reset value: 0x0
0x0 -> R_RX_FULL interrupt is inactive
0x1 -> R_RX_FULL interrupt is active
RO 0x0
1 R_RX_OVER See IC_RAW_INTR_STAT for a detailed description of
R_RX_OVER bit.
Reset value: 0x0
0x0 -> R_RX_OVER interrupt is inactive
0x1 -> R_RX_OVER interrupt is active
RO 0x0
0 R_RX_UNDER See IC_RAW_INTR_STAT for a detailed description of
R_RX_UNDER bit.
Reset value: 0x0
0x0 -> RX_UNDER interrupt is inactive
0x1 -> RX_UNDER interrupt is active
RO 0x0
IC_INTR_MASK Register
Description
I2C Interrupt Mask Register.
These bits mask their corresponding interrupt status bits. This register is active low; a value of 0 masks the interrupt,
whereas a value of 1 unmasks the interrupt.
Table 490.
IC_INTR_MASK
Register
Bits Name Description Type Reset
31:14 Reserved. - - -
13 M_MASTER_ON_H
OLD_READ_ONLY
This M_MASTER_ON_HOLD_read_only bit masks the
R_MASTER_ON_HOLD interrupt in IC_INTR_STAT register.
Reset value: 0x0
0x0 -> MASTER_ON_HOLD interrupt is masked
0x1 -> MASTER_ON_HOLD interrupt is unmasked
RO 0x0
12 M_RESTART_DET This bit masks the R_RESTART_DET interrupt in
IC_INTR_STAT register.
Reset value: 0x0
0x0 -> RESTART_DET interrupt is masked
0x1 -> RESTART_DET interrupt is unmasked
RW 0x0
RP2040 Datasheet
4.4. I2C 500