Datasheet

Table Of Contents
Offset Name Info
0x34 IC_RAW_INTR_STAT I2C Raw Interrupt Status Register
0x38 IC_RX_TL I2C Receive FIFO Threshold Register
0x3c IC_TX_TL I2C Transmit FIFO Threshold Register
0x40 IC_CLR_INTR Clear Combined and Individual Interrupt Register
0x44 IC_CLR_RX_UNDER Clear RX_UNDER Interrupt Register
0x48 IC_CLR_RX_OVER Clear RX_OVER Interrupt Register
0x4c IC_CLR_TX_OVER Clear TX_OVER Interrupt Register
0x50 IC_CLR_RD_REQ Clear RD_REQ Interrupt Register
0x54 IC_CLR_TX_ABRT Clear TX_ABRT Interrupt Register
0x58 IC_CLR_RX_DONE Clear RX_DONE Interrupt Register
0x5c IC_CLR_ACTIVITY Clear ACTIVITY Interrupt Register
0x60 IC_CLR_STOP_DET Clear STOP_DET Interrupt Register
0x64 IC_CLR_START_DET Clear START_DET Interrupt Register
0x68 IC_CLR_GEN_CALL Clear GEN_CALL Interrupt Register
0x6c IC_ENABLE I2C ENABLE Register
0x70 IC_STATUS I2C STATUS Register
0x74 IC_TXFLR I2C Transmit FIFO Level Register
0x78 IC_RXFLR I2C Receive FIFO Level Register
0x7c IC_SDA_HOLD I2C SDA Hold Time Length Register
0x80 IC_TX_ABRT_SOURCE I2C Transmit Abort Source Register
0x84 IC_SLV_DATA_NACK_ONLY Generate Slave Data NACK Register
0x88 IC_DMA_CR DMA Control Register
0x8c IC_DMA_TDLR DMA Transmit Data Level Register
0x90 IC_DMA_RDLR DMA Transmit Data Level Register
0x94 IC_SDA_SETUP I2C SDA Setup Register
0x98 IC_ACK_GENERAL_CALL I2C ACK General Call Register
0x9c IC_ENABLE_STATUS I2C Enable Status Register
0xa0 IC_FS_SPKLEN I2C SS, FS or FM+ spike suppression limit
0xa8 IC_CLR_RESTART_DET Clear RESTART_DET Interrupt Register
0xf4 IC_COMP_PARAM_1 Component Parameter Register 1
0xf8 IC_COMP_VERSION I2C Component Version Register
0xfc IC_COMP_TYPE I2C Component Type Register
IC_CON Register
Description
I2C Control Register. This register can be written only when the DW_apb_i2c is disabled, which corresponds to the
IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
RP2040 Datasheet
4.4. I2C 488