Datasheet

217 interp_set_config(interp0, 0, &cfg);
218
219 interp_config_shift(&cfg, uv_fractional_bits - texture_width_bits);
220 interp_config_mask(&cfg, texture_width_bits, texture_width_bits + texture_height_bits -
Ê 1);
221 interp_set_config(interp0, 1, &cfg);
222
223 interp0->base[2] = (uintptr_t) texture;
224 }
225
226 void texture_mapped_span(uint8_t *output, uint32_t u, uint32_t v, uint32_t du, uint32_t dv,
Ê uint count) {
227 // u, v are texture coordinates in fixed point with uv_fractional_bits fractional bits
228 // du, dv are texture coordinate steps across the span in same fixed point.
229 interp0->accum[0] = u;
230 interp0->base[0] = du;
231 interp0->accum[1] = v;
232 interp0->base[1] = dv;
233 for (uint i = 0; i < count; i++) {
234 // equivalent to
235 // uint32_t sm_result0 = (accum0 >> uv_fractional_bits) & (1 << (texture_width_bits -
Ê 1);
236 // uint32_t sm_result1 = (accum1 >> uv_fractional_bits) & (1 << (texture_height_bits
Ê - 1);
237 // uint8_t *address = texture + sm_result0 + (sm_result1 << texture_width_bits);
238 // output[i] = *address;
239 // accum0 = du + accum0;
240 // accum1 = dv + accum1;
241
242 // result2 is the texture address for the current pixel;
243 // popping the result advances to the next iteration
244 output[i] = *(uint8_t *) interp0->pop[2];
245 }
246 }
247
248 void texture_mapping() {
249 puts("Affine Texture mapping (with texture wrap):");
250
251 uint8_t texture[] = {
252 0x00, 0x01, 0x02, 0x03,
253 0x10, 0x11, 0x12, 0x13,
254 0x20, 0x21, 0x22, 0x23,
255 0x30, 0x31, 0x32, 0x33,
256 };
257 // 4x4 texture
258 texture_mapping_setup(texture, 2, 2, 16);
259 uint8_t output[12];
260 uint32_t du = 65536 / 2; // step of 1/2
261 uint32_t dv = 65536 / 3; // step of 1/3
262 texture_mapped_span(output, 0, 0, du, dv, 12);
263
264 for (uint i = 0; i < 12; i++) {
265 printf("0x%02x\n", output[i]);
266 }
267 }
This should print:
0x00
0x00
0x01
RP2040 Datasheet
2.3. Processor subsystem 45