Datasheet

Bits Name Description Type Reset
11 RTS Request to send. This bit is the complement of the UART
request to send, nUARTRTS, modem status output. That is,
when the bit is programmed to a 1 then nUARTRTS is LOW.
RW 0x0
10 DTR Data transmit ready. This bit is the complement of the
UART data transmit ready, nUARTDTR, modem status
output. That is, when the bit is programmed to a 1 then
nUARTDTR is LOW.
RW 0x0
9 RXE Receive enable. If this bit is set to 1, the receive section of
the UART is enabled. Data reception occurs for either UART
signals or SIR signals depending on the setting of the
SIREN bit. When the UART is disabled in the middle of
reception, it completes the current character before
stopping.
RW 0x1
8 TXE Transmit enable. If this bit is set to 1, the transmit section
of the UART is enabled. Data transmission occurs for either
UART signals, or SIR signals depending on the setting of
the SIREN bit. When the UART is disabled in the middle of
transmission, it completes the current character before
stopping.
RW 0x1
7 LBE Loopback enable. If this bit is set to 1 and the SIREN bit is
set to 1 and the SIRTEST bit in the Test Control Register,
UARTTCR is set to 1, then the nSIROUT path is inverted,
and fed through to the SIRIN path. The SIRTEST bit in the
test register must be set to 1 to override the normal half-
duplex SIR operation. This must be the requirement for
accessing the test registers during normal operation, and
SIRTEST must be cleared to 0 when loopback testing is
finished. This feature reduces the amount of external
coupling required during system test. If this bit is set to 1,
and the SIRTEST bit is set to 0, the UARTTXD path is fed
through to the UARTRXD path. In either SIR mode or UART
mode, when this bit is set, the modem outputs are also fed
through to the modem inputs. This bit is cleared to 0 on
reset, to disable loopback.
RW 0x0
6:3 Reserved. - - -
2 SIRLP SIR low-power IrDA mode. This bit selects the IrDA
encoding mode. If this bit is cleared to 0, low-level bits are
transmitted as an active high pulse with a width of 3 / 16th
of the bit period. If this bit is set to 1, low-level bits are
transmitted with a pulse width that is 3 times the period of
the IrLPBaud16 input signal, regardless of the selected bit
rate. Setting this bit uses less power, but might reduce
transmission distances.
RW 0x0
RP2040 Datasheet
4.3. UART 456