Datasheet

Table Of Contents
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4.3.8. List of Registers
Table 453. List of
UART registers
Offset Name Info
0x000 UARTDR Data Register, UARTDR
0x004 UARTRSR Receive Status Register/Error Clear Register, UARTRSR/UARTECR
0x018 UARTFR Flag Register, UARTFR
0x020 UARTILPR IrDA Low-Power Counter Register, UARTILPR
0x024 UARTIBRD Integer Baud Rate Register, UARTIBRD
0x028 UARTFBRD Fractional Baud Rate Register, UARTFBRD
0x02c UARTLCR_H Line Control Register, UARTLCR_H
0x030 UARTCR Control Register, UARTCR
0x034 UARTIFLS Interrupt FIFO Level Select Register, UARTIFLS
0x038 UARTIMSC Interrupt Mask Set/Clear Register, UARTIMSC
0x03c UARTRIS Raw Interrupt Status Register, UARTRIS
0x040 UARTMIS Masked Interrupt Status Register, UARTMIS
0x044 UARTICR Interrupt Clear Register, UARTICR
0x048 UARTDMACR DMA Control Register, UARTDMACR
0xfe0 UARTPERIPHID0 UARTPeriphID0 Register
0xfe4 UARTPERIPHID1 UARTPeriphID1 Register
0xfe8 UARTPERIPHID2 UARTPeriphID2 Register
0xfec UARTPERIPHID3 UARTPeriphID3 Register
0xff0 UARTPCELLID0 UARTPCellID0 Register
0xff4 UARTPCELLID1 UARTPCellID1 Register
0xff8 UARTPCELLID2 UARTPCellID2 Register
0xffc UARTPCELLID3 UARTPCellID3 Register
UARTDR Register
Description
Data Register, UARTDR
Table 454. UARTDR
Register
Bits Name Description Type Reset
31:12 Reserved. - - -
11 OE Overrun error. This bit is set to 1 if data is received and the
receive FIFO is already full. This is cleared to 0 once there
is an empty space in the FIFO and a new character can be
written to it.
RO -
RP2040 Datasheet
4.3. UART 451