Datasheet

Table Of Contents
4.2.2. Starting Channels
There are three ways to start a channel:
Writing to a channel trigger register
A chain trigger from another channel which has just completed, and has its CHAIN_TO field configured
The MULTI_CHAN_TRIGGER register, which can start multiple channels at once
Each of these covers different use cases. For example, trigger registers are simple and efficient when configuring and
starting a channel in an interrupt service routine, and CHAIN_TO allows one channel to callback to another channel, which
can then reconfigure the first channel.
NOTE
Triggering a channel which is already running has no effect.
4.2.2.1. Aliases and Triggers
Table 415. Control
register aliases. Each
channel has four
control/status
registers. Each
register can be
accessed at multiple
different addresses. In
each naturally-aligned
group of four, all four
registers appear, in
different orders.
Offset +0x0 +0x4 +0x8 +0xC (Trigger)
0x00 (Alias 0) READ_ADDR WRITE_ADDR TRANS_COUNT CTRL_TRIG
0x10 (Alias 1) CTRL READ_ADDR WRITE_ADDR TRANS_COUNT_TRIG
0x20 (Alias 2) CTRL TRANS_COUNT READ_ADDR WRITE_ADDR_TRIG
0x30 (Alias 3) CTRL WRITE_ADDR TRANS_COUNT READ_ADD_TRIG
The four CSRs are aliased multiple times in memory. Each aliasof which there are fourexposes the same four
physical registers, but in a different order. The final register in each alias (at offset +0xC, highlighted) is a trigger register.
Writing to the trigger register starts the channel.
Often, only alias 0 is used, and aliases 1-3 can be ignored. The channel is configured and started by writing READ_ADDR,
WRITE_ADDR, TRANS_COUNT and finally CTRL. Since CTRL is the trigger register in alias 0, this starts the channel.
The other aliases allow more compact control block lists when using one channel to configure another, and more efficient
reconfiguration and launch in interrupt handlers:
Each CSR is a trigger register in one of the aliases:
When gathering fixed-size buffers into a peripheral, the DMA channel can be configured and launched by writing
only READ_ADDR_TRIG.
When scattering from a peripheral to fixed-size buffers, the channel can be configured and launched by writing
only WRITE_ADDR_TRIG.
Useful combinations of registers appear as naturally-aligned tuples which contain a trigger register. In conjunction
with channel chaining and address wrapping, these implement compressed control block formats, e.g.:
(WRITE_ADDR, TRANS_COUNT_TRIG) for peripheral scatter operations
(TRANS_COUNT, READ_ADDR_TRIG) for peripheral gather operations, or calculating CRCs on a list of buffers
(READ_ADDR, WRITE_ADDR_TRIG) for manipulating fixed-size buffers in memory
Trigger registers do not start the channel if:
The channel is disabled via CTRL.EN. (If the trigger is CTRL, the just-written value of EN is used, not the value currently in
the CTRL register.)
The channel is already running
RP2040 Datasheet
4.2. DMA 416