Datasheet

Table Of Contents
2.3.1.6.2. Blend Mode
Blend mode is available on INTERP0 on each core, and is enabled by the CTRL_LANE0_BLEND control flag. It performs linear
interpolation, which we define as follows:
Where is the register BASE0, is the register BASE1, and is a fractional value formed from the least significant 8 bits of
the lane 1 shift and mask value.
Blend mode has the following differences from normal mode:
PEEK0, POP0 return the 8-bit alpha value (the 8 LSBs of the lane 1 shift and mask value), with zeroes in result bits 31
down to 24.
PEEK1, POP1 return the linear interpolation between BASE0 and BASE1
PEEK2, POP2 do not include lane 1 result in the addition (i.e. it is BASE2 + lane 0 shift and mask value)
The result of the linear interpolation is equal to BASE0 when the alpha value is 0, and equal to BASE0 + 255/256 * (BASE1 -
BASE0) when the alpha value is all-ones.
Pico Examples: https://github.com/raspberrypi/pico-examples/tree/pre_release/interp/hello_interp/hello_interp.c Lines 65 - 84
65 void simple_blend1() {
66 puts("Simple blend 1:");
67
68 interp_config cfg = interp_default_config();
69 interp_config_blend(&cfg, true);
70 interp_set_config(interp0, 0, &cfg);
71
72 cfg = interp_default_config();
73 interp_set_config(interp0, 1, &cfg);
74
75 interp0->base[0] = 500;
76 interp0->base[1] = 1000;
77
78 for (int i = 0; i <= 6; i++) {
79 // set fraction to value between 0 and 255
80 interp0->accum[1] = 255 * i / 6;
81 // ≈ 500 + (1000 - 500) * i / 6;
82 printf("%d\n", (int) interp0->peek[1]);
83 }
84 }
This should print (note the 255/256 resulting in 998 not 1000):
500
582
666
748
832
914
998
CTRL_LANE1_SIGNED controls whether BASE0 and BASE1 are sign-extended for this interpolation (this sign extension is required
because the interpolation produces an intermediate product value 40 bits in size). CTRL_LANE0_SIGNED continues to control
the sign extension of the lane 0 intermediate result in PEEK2, POP2 as normal.
RP2040 Datasheet
2.3. Processor subsystem 40