Datasheet

Bits Name Description Type Reset
4 EP2_IN WC 0x0
3 EP1_OUT WC 0x0
2 EP1_IN WC 0x0
1 EP0_OUT WC 0x0
0 EP0_IN WC 0x0
EP_STALL_ARM Register
Description
Device: this bit must be set in conjunction with the STALL bit in the buffer control register to send a STALL on EP0. The
device controller clears these bits when a SETUP packet is received because the USB spec requires that a STALL
condition is cleared when a SETUP packet is received.
Table 403.
EP_STALL_ARM
Register
Bits Name Description Type Reset
31:2 Reserved. - - -
1 EP0_OUT RW 0x0
0 EP0_IN RW 0x0
NAK_POLL Register
Description
Used by the host controller. Sets the wait time in microseconds before trying again if the device replies with a NAK.
Table 404. NAK_POLL
Register
Bits Name Description Type Reset
31:26 Reserved. - - -
25:16 DELAY_FS NAK polling interval for a full speed device RW 0x010
15:10 Reserved. - - -
9:0 DELAY_LS NAK polling interval for a low speed device RW 0x010
EP_STATUS_STALL_NAK Register
Description
Device: bits are set when the IRQ_ON_NAK or IRQ_ON_STALL bits are set. For EP0 this comes from SIE_CTRL. For all other
endpoints it comes from the endpoint control register.
Table 405.
EP_STATUS_STALL_N
AK Register
Bits Name Description Type Reset
31 EP15_OUT WC 0x0
30 EP15_IN WC 0x0
29 EP14_OUT WC 0x0
28 EP14_IN WC 0x0
27 EP13_OUT WC 0x0
26 EP13_IN WC 0x0
25 EP12_OUT WC 0x0
24 EP12_IN WC 0x0
RP2040 Datasheet
4.1. USB 405