Datasheet

Bits Name Description Type Reset
10 SM2 RW 0x0
9 SM1 RW 0x0
8 SM0 RW 0x0
7 SM3_TXNFULL RW 0x0
6 SM2_TXNFULL RW 0x0
5 SM1_TXNFULL RW 0x0
4 SM0_TXNFULL RW 0x0
3 SM3_RXNEMPTY RW 0x0
2 SM2_RXNEMPTY RW 0x0
1 SM1_RXNEMPTY RW 0x0
0 SM0_RXNEMPTY RW 0x0
IRQ0_INTS Register
Description
Interrupt status after masking & forcing for irq0
Table 383. IRQ0_INTS
Register
Bits Name Description Type Reset
31:12 Reserved. - - -
11 SM3 RO 0x0
10 SM2 RO 0x0
9 SM1 RO 0x0
8 SM0 RO 0x0
7 SM3_TXNFULL RO 0x0
6 SM2_TXNFULL RO 0x0
5 SM1_TXNFULL RO 0x0
4 SM0_TXNFULL RO 0x0
3 SM3_RXNEMPTY RO 0x0
2 SM2_RXNEMPTY RO 0x0
1 SM1_RXNEMPTY RO 0x0
0 SM0_RXNEMPTY RO 0x0
IRQ1_INTE Register
Description
Interrupt Enable for irq1
Table 384. IRQ1_INTE
Register
Bits Name Description Type Reset
31:12 Reserved. - - -
11 SM3 RW 0x0
10 SM2 RW 0x0
RP2040 Datasheet
3.8. List of Registers 378