Datasheet

3.7.4. I2S
Ê1 .program i2s_2x16
Ê2 .side_set 2
Ê3
Ê4 ; Transmit a stereo I2S audio stream.
Ê5 ; This is 16 bits per sample; can be altered by modifying the "set" params,
Ê6 ; or made programmable by replacing "set x" with "mov x, y" and using Y as a config
Ê register.
Ê7 ;
Ê8 ; Autopull must be enabled, with threshold set to 32.
Ê9 ; Since I2S is MSB-first, shift direction should be to left.
10 ; Hence the format of the FIFO word is:
11 ;
12 ; | 31 : 16 | 15 : 0 |
13 ; | sample ws=0 | sample ws=1 |
14 ;
15 ; Data is output at 1 bit per 2 clocks. Use clock divider to adjust frequency.
16 ; Fractional divider will probably be needed to get correct bit clock period,
17 ; but for common syslck freqs this should still give a constant word select period.
18 ;
19 ; One output pin is used for the data output.
20 ; Two side-set pins are used. Bit 0 is clock, bit 1 is word select.
21
22 .wrap_target
23 ; Loops are partially unrolled so that set delay can replace a jump delay
24 ; Note that word select toggles for final bit of each word, *not* first of next
25 bitloop0:
26 out pins, 1 set 0x0
27 jmp x-- bitloop0 set 0x1
28
29 out pins, 1 set 0x2
30 set x, 14 set 0x3
31 bitloop1:
32 out pins, 1 set 0x2
33 jmp x-- bitloop1 set 0x3
34 out pins, 1 set 0x0
35 .extern entry_point
36 set x, 14 set 0x1
37 .wrap
3.7.5. IRDA Receiver
TO DO: LUKE/GRAHAM/LIAM: I think more detail is needed here - wiring etc?
Wait for the start bit, capture a programmable number of bit samples, then interrupt the processor to scan through it.
Thanks to WIC on Cortex-M0, the processor can stay in sleep during this time. This has a huge impact on power
consumption.
1 .wrap
2 pull
3 out x, 32 ; Get a sample count from the processor
4 wait 0 pin 0 ; Wait for start bit on the mapped input pin
5 sample_loop:
6 in pins, 1
7 jmp x-- sample_loop
8 irq wait 0 rel ; Tell the processor the capture buffer is ready, and wait for
RP2040 Datasheet
3.7. Outdated Examples 366