Datasheet

Table Of Contents
2.3.1.5. Integer Divider
The SIO provides one 8-cycle signed/unsigned divide/modulo module to each of the cores. Calculation is started by
writing a dividend and divisor to the two argument registers, DIVIDEND and DIVISOR. The divider calculates the quotient / and
remainder % of this division over the next 8 cycles, and on the 9th cycle the results can be read from the two result
registers DIV_QUOTIENT and DIV_REMAINDER. A 'ready' bit in register DIV_CSR can be polled to wait for the calculation to
complete, or software can insert a fixed 8-cycle delay.
Pico SDK: https://github.com/raspberrypi/pico-sdk/tree/pre_release/src/rp2_common/hardware_divider/divider.S Lines 18 - 38
18 .macro __divider_delay
19 // delay 8 cycles
20 b 1f
21 1: b 1f
22 1: b 1f
23 1: b 1f
24 1:
25 .endm
26
27 .align 2
28
29 function_with_section hw_divider_divmod_s32
30 ldr r3, =(SIO_BASE)
31 str r0, [r3, #SIO_DIV_SDIVIDEND_OFFSET]
32 str r1, [r3, #SIO_DIV_SDIVISOR_OFFSET]
33 __divider_delay
34 // return 64 bit value so we can efficiently return both (note quotient must be read
Ê last)
35 ldr r1, [r3, #SIO_DIV_REMAINDER_OFFSET]
36 ldr r0, [r3, #SIO_DIV_QUOTIENT_OFFSET]
37 bx lr
NOTE
Software is free to perform other non divider operations during these 8 cycles.
There are two aliases of the operand registers: writing to the signed alias (DIV_SDIVIDEND and DIV_SDIVISOR) will initiate
a signed calculation, and the other (DIV_UDIVIDEND and DIV_UDIVISOR) will initiate an unsigned calculation.
Pico SDK: https://github.com/raspberrypi/pico-sdk/tree/pre_release/src/rp2_common/hardware_divider/divider.S Lines 44 - 52
44 function_with_section hw_divider_divmod_u32
45 ldr r3, =(SIO_BASE)
46 str r0, [r3, #SIO_DIV_UDIVIDEND_OFFSET]
47 str r1, [r3, #SIO_DIV_UDIVISOR_OFFSET]
48 __divider_delay
49 // return 64 bit value so we can efficiently return both (note quotient must be read
Ê last)
50 ldr r1, [r3, #SIO_DIV_REMAINDER_OFFSET]
51 ldr r0, [r3, #SIO_DIV_QUOTIENT_OFFSET]
52 bx lr
RP2040 Datasheet
2.3. Processor subsystem 35