Datasheet

30 mm_pio->txf[0] = instructions_to_push_program[2]; // push
31
32 // The program pushed into TX FIFO will return some data in RX FIFO
33 while (mm_pio->fstat & (1u << PIO_FSTAT_RXEMPTY_LSB))
34 ;
35
36 printf("%d\n", mm_pio->rxf[0]);
37
38 return 0;
39 }
Here we load an example program into the state machine, which does two things:
•
Enters an infinite loop
•
Enters a loop which repeatedly pops 32 bits of data from the TX FIFO, and executes the lower 16 bits as an
instruction
The C program sets the state machine running, at which point it enters the hang loop. While the state machine is still
running, the C program forces in a jmp instruction, which causes the state machine to break out of the loop.
When an instruction is written to the INSTR register, the state machine immediately decodes and executes that instruction,
rather than the instruction it would have fetched from the PIO’s instruction memory. The program counter does not
advance, so on the next cycle (assuming the instruction forced into the INSTR interface did not stall) the state machine
continues to execute its current program from the point where it left off, unless the written instruction itself manipulated
PC.
Delay cycles are ignored on instructions written to the INSTR register, and execute immediately, ignoring the state machine
clock divider. This interface is provided for performing initial setup and effecting control flow changes, so it executes
instructions in a timely manner, no matter how the state machine is configured.
Instructions written to the INSTR register are permitted to stall, in which case the state machine will latch this instruction
internally until it completes. This is signified by the EXECCTRL_EXEC_STALLED flag. This can be cleared by restarting the state
machine, or writing a NOP to INSTR.
In the second phase of the example state machine program, the OUT EXEC instruction is used. The OUT itself occupies one
execution cycle, and the instruction which the OUT executes is on the next execution cycle. Note that one of the
instructions we execute is also an OUT — the state machine is only capable of executing one OUT instruction on any given
cycle.
OUT EXEC works by writing the OUT shift data to an internal instruction latch. On the next cycle, the state machine
remembers it must execute from this latch rather than the instruction memory, and also knows to not advance PC on this
second cycle.
This program will print "12345678" when run.

CAUTION
If an instruction written to INSTR stalls, it is stored in the same instruction latch used by OUT EXEC and MOV EXEC, and will
overwrite an in-progress instruction there. If EXEC instructions are used, instructions written to INSTR must not stall.
3.6. Examples
3.6.1. Duplex SPI
RP2040 Datasheet
3.6. Examples 343