Datasheet

2.18.1. Overview
RP2040 has 36 multi-functional General Purpose Input / Output (GPIO) pins, divided into two banks. In a typical use case,
the pins in the QSPI bank (QSPI_SS, QSPI_SCLK and QSPI_SD0 to QSPI_SD3) are used to execute code from an external
flash device, leaving the User bank (GPIO0 to GPIO29) for the programmer to use. All GPIOs support digital input and
output, but GPIO26 to GPIO29 can also be used as inputs to the chip’s Analogue to Digital Converter (ADC). Each GPIO
can be controlled directly by software running on the processors, or by a number of other functional blocks.
The User GPIO bank supports the following functions:
•
processor controlled general purpose IO (GPIO) - Section 2.3.1.2, “GPIO Control”
•
programmable IO (PIO) - Chapter 3, PIO
•
2 x SPI - Section 4.5, “SPI”
•
2 x UART - Section 4.3, “UART”
•
2 x I2C (two-wire serial interface) - Section 4.4, “I2C”
•
8 x two-channel PWM - Section 4.6, “PWM”
•
2 x external clock inputs - Section 2.14.2.3, “External Clocks”
•
4 x general purpose clock output - TO DO: TERRY/LIAM: cross reference. Is there a section to cross reference to?
•
4 x input to ADC - Section 4.10, “ADC and Temperature Sensor”
•
USB VBUS management - Section 4.1.2.8, “VBUS Control”
•
External interrupt requests, level or edge-sensitive
The QSPI bank supports the following functions:
•
processor controlled General Purpose IO (GPIO) - Section 2.3.1.2, “GPIO Control”
•
Flash execute in place (XIP) - Execute-In-Place
The logical structure of an example IO is shown in Figure 34.
RP2040 Datasheet
2.18. GPIO 208